mmCP_IB1_BASE_LO 7320 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_IB1_BASE_LO                                                                               0x20cc
mmCP_IB1_BASE_LO 4812 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_IB1_BASE_LO                                                                               0x20cc
mmCP_IB1_BASE_LO 5064 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_IB1_BASE_LO                                                                               0x20cc
mmCP_IB1_BASE_LO 5020 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_IB1_BASE_LO                                                                               0x20cc
mmCP_IB1_BASE_LO  426 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmCP_IB1_BASE_LO 0x21CC
mmCP_IB1_BASE_LO  523 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_IB1_BASE_LO                                                        0xc0cc
mmCP_IB1_BASE_LO  536 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_IB1_BASE_LO                                                        0xc0cc
mmCP_IB1_BASE_LO  589 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_IB1_BASE_LO                                                        0xc0cc
mmCP_IB1_BASE_LO  589 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_IB1_BASE_LO                                                        0xc0cc