mmCP_HQD_WG_STATE_OFFSET 5380 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_WG_STATE_OFFSET                                                                       0x1fd9
mmCP_HQD_WG_STATE_OFFSET 2892 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_WG_STATE_OFFSET                                                                       0x1275
mmCP_HQD_WG_STATE_OFFSET 3142 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_WG_STATE_OFFSET                                                                       0x1275
mmCP_HQD_WG_STATE_OFFSET 3098 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_WG_STATE_OFFSET                                                                       0x1275
mmCP_HQD_WG_STATE_OFFSET  681 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_HQD_WG_STATE_OFFSET                                                0x3275
mmCP_HQD_WG_STATE_OFFSET  681 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_HQD_WG_STATE_OFFSET                                                0x3275