mmCP_HQD_SEMA_CMD 5332 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_SEMA_CMD                                                                              0x1fc3
mmCP_HQD_SEMA_CMD 2844 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_SEMA_CMD                                                                              0x125f
mmCP_HQD_SEMA_CMD 3094 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_SEMA_CMD                                                                              0x125f
mmCP_HQD_SEMA_CMD 3050 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_SEMA_CMD                                                                              0x125f
mmCP_HQD_SEMA_CMD  593 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_HQD_SEMA_CMD                                                       0x325f
mmCP_HQD_SEMA_CMD  606 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_HQD_SEMA_CMD                                                       0x325f
mmCP_HQD_SEMA_CMD  657 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_HQD_SEMA_CMD                                                       0x325f
mmCP_HQD_SEMA_CMD  657 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_HQD_SEMA_CMD                                                       0x325f