mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 5308 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                                                  0x1fb7
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 2820 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                                                  0x1253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 3070 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                                                  0x1253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 3026 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                                                  0x1253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI  581 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI  594 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI  644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253
mmCP_HQD_PQ_WPTR_POLL_ADDR_HI  644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253