mmCP_HQD_PQ_WPTR_POLL_ADDR 5306 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                                                     0x1fb6
mmCP_HQD_PQ_WPTR_POLL_ADDR 2818 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                                                     0x1252
mmCP_HQD_PQ_WPTR_POLL_ADDR 3068 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                                                     0x1252
mmCP_HQD_PQ_WPTR_POLL_ADDR 3024 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                                                     0x1252
mmCP_HQD_PQ_WPTR_POLL_ADDR  580 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252
mmCP_HQD_PQ_WPTR_POLL_ADDR  593 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252
mmCP_HQD_PQ_WPTR_POLL_ADDR  643 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252
mmCP_HQD_PQ_WPTR_POLL_ADDR  643 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252