mmCP_HQD_PQ_WPTR_LO 5392 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_PQ_WPTR_LO                                                                            0x1fdf
mmCP_HQD_PQ_WPTR_LO 2904 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_PQ_WPTR_LO                                                                            0x127b
mmCP_HQD_PQ_WPTR_LO 3154 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_PQ_WPTR_LO                                                                            0x127b
mmCP_HQD_PQ_WPTR_LO 3110 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_PQ_WPTR_LO                                                                            0x127b