mmCP_HQD_PQ_WPTR_HI_BASE_IDX 5395 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_PQ_WPTR_HI_BASE_IDX                                                                   0
mmCP_HQD_PQ_WPTR_HI_BASE_IDX 2907 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_PQ_WPTR_HI_BASE_IDX                                                                   0
mmCP_HQD_PQ_WPTR_HI_BASE_IDX 3157 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_PQ_WPTR_HI_BASE_IDX                                                                   0
mmCP_HQD_PQ_WPTR_HI_BASE_IDX 3113 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_PQ_WPTR_HI_BASE_IDX                                                                   0