mmCP_HQD_PQ_WPTR_HI 5394 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_PQ_WPTR_HI 0x1fe0 mmCP_HQD_PQ_WPTR_HI 2906 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_PQ_WPTR_HI 0x127c mmCP_HQD_PQ_WPTR_HI 3156 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_PQ_WPTR_HI 0x127c mmCP_HQD_PQ_WPTR_HI 3112 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_PQ_WPTR_HI 0x127c