mmCP_HQD_IQ_TIMER 5322 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_IQ_TIMER 0x1fbf mmCP_HQD_IQ_TIMER 2834 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_IQ_TIMER 0x125b mmCP_HQD_IQ_TIMER 3084 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_IQ_TIMER 0x125b mmCP_HQD_IQ_TIMER 3040 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_IQ_TIMER 0x125b mmCP_HQD_IQ_TIMER 589 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCP_HQD_IQ_TIMER 0x325b mmCP_HQD_IQ_TIMER 602 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCP_HQD_IQ_TIMER 0x325b mmCP_HQD_IQ_TIMER 652 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_HQD_IQ_TIMER 0x325b mmCP_HQD_IQ_TIMER 652 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_HQD_IQ_TIMER 0x325b