mmCP_HQD_HQ_STATUS0_BASE_IDX 5347 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_HQ_STATUS0_BASE_IDX                                                                   0
mmCP_HQD_HQ_STATUS0_BASE_IDX 2859 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_HQ_STATUS0_BASE_IDX                                                                   0
mmCP_HQD_HQ_STATUS0_BASE_IDX 3109 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_HQ_STATUS0_BASE_IDX                                                                   0
mmCP_HQD_HQ_STATUS0_BASE_IDX 3065 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_HQ_STATUS0_BASE_IDX                                                                   0