mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 5351 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 0 mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 2863 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 0 mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 3113 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 0 mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 3069 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 0