mmCP_HQD_EOP_CONTROL_BASE_IDX 5363 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_EOP_CONTROL_BASE_IDX                                                                  0
mmCP_HQD_EOP_CONTROL_BASE_IDX 2875 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_EOP_CONTROL_BASE_IDX                                                                  0
mmCP_HQD_EOP_CONTROL_BASE_IDX 3125 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_EOP_CONTROL_BASE_IDX                                                                  0
mmCP_HQD_EOP_CONTROL_BASE_IDX 3081 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_EOP_CONTROL_BASE_IDX                                                                  0