mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX 5375 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX                                                             0
mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX 2887 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX                                                             0
mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX 3137 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX                                                             0
mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX 3093 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX                                                             0