mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX 5279 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX                                                             0
mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX 2791 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX                                                             0
mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX 3041 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX                                                             0
mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX 2997 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX                                                             0