mmCP_DE_LAST_INVAL_COUNT_BASE_IDX 2163 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX                                                              0
mmCP_DE_LAST_INVAL_COUNT_BASE_IDX  159 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX                                                              0
mmCP_DE_LAST_INVAL_COUNT_BASE_IDX  159 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX                                                              0
mmCP_DE_LAST_INVAL_COUNT_BASE_IDX  153 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX                                                              0