mmCP_CPC_MGCG_SYNC_CNTL 4684 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                                        0x1dd6
mmCP_CPC_MGCG_SYNC_CNTL 2315 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                                        0x1036
mmCP_CPC_MGCG_SYNC_CNTL 2614 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                                        0x1036
mmCP_CPC_MGCG_SYNC_CNTL 2552 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                                        0x1036
mmCP_CPC_MGCG_SYNC_CNTL  218 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                 0x3036
mmCP_CPC_MGCG_SYNC_CNTL  218 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_CPC_MGCG_SYNC_CNTL                                                 0x3036