mmCP_CPC_IC_OP_CNTL 10262 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CPC_IC_OP_CNTL 0x584f mmCP_CPC_IC_OP_CNTL 2582 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CPC_IC_OP_CNTL 0x10bc mmCP_CPC_IC_OP_CNTL 2874 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CPC_IC_OP_CNTL 0x10bc mmCP_CPC_IC_OP_CNTL 2808 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CPC_IC_OP_CNTL 0x10bc mmCP_CPC_IC_OP_CNTL 349 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_CPC_IC_OP_CNTL 0x30bc mmCP_CPC_IC_OP_CNTL 349 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_CPC_IC_OP_CNTL 0x30bc