mmCP_CPC_IC_BASE_LO 10256 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CPC_IC_BASE_LO                                                                            0x584c
mmCP_CPC_IC_BASE_LO 2576 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CPC_IC_BASE_LO                                                                            0x10b9
mmCP_CPC_IC_BASE_LO 2868 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CPC_IC_BASE_LO                                                                            0x10b9
mmCP_CPC_IC_BASE_LO 2802 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CPC_IC_BASE_LO                                                                            0x10b9
mmCP_CPC_IC_BASE_LO  346 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_CPC_IC_BASE_LO                                                     0x30b9
mmCP_CPC_IC_BASE_LO  346 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_CPC_IC_BASE_LO                                                     0x30b9