mmCP_CPC_GFX_CNTL 5158 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CPC_GFX_CNTL                                                                              0x1f5a
mmCP_CPC_GFX_CNTL 2648 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CPC_GFX_CNTL                                                                              0x11ba
mmCP_CPC_GFX_CNTL 2922 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CPC_GFX_CNTL                                                                              0x11ba
mmCP_CPC_GFX_CNTL 2856 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CPC_GFX_CNTL                                                                              0x11ba