mmCP_CE_ROQ_RB_STAT_BASE_IDX 2257 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CE_ROQ_RB_STAT_BASE_IDX                                                                   0
mmCP_CE_ROQ_RB_STAT_BASE_IDX  253 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CE_ROQ_RB_STAT_BASE_IDX                                                                   0
mmCP_CE_ROQ_RB_STAT_BASE_IDX  253 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CE_ROQ_RB_STAT_BASE_IDX                                                                   0
mmCP_CE_ROQ_RB_STAT_BASE_IDX  247 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CE_ROQ_RB_STAT_BASE_IDX                                                                   0