mmCP_CE_PRGRM_CNTR_START_BASE_IDX 4893 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CE_PRGRM_CNTR_START_BASE_IDX                                                              0
mmCP_CE_PRGRM_CNTR_START_BASE_IDX 2533 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CE_PRGRM_CNTR_START_BASE_IDX                                                              0
mmCP_CE_PRGRM_CNTR_START_BASE_IDX 2825 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CE_PRGRM_CNTR_START_BASE_IDX                                                              0
mmCP_CE_PRGRM_CNTR_START_BASE_IDX 2759 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CE_PRGRM_CNTR_START_BASE_IDX                                                              0