mmCP_CE_METADATA_BASE_ADDR_HI 7372 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                                                  0x20f3
mmCP_CE_METADATA_BASE_ADDR_HI 4848 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                                                  0x20f3
mmCP_CE_METADATA_BASE_ADDR_HI 5100 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                                                  0x20f3
mmCP_CE_METADATA_BASE_ADDR_HI 5056 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                                                  0x20f3
mmCP_CE_METADATA_BASE_ADDR_HI  549 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                           0xc0f3
mmCP_CE_METADATA_BASE_ADDR_HI  549 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCP_CE_METADATA_BASE_ADDR_HI                                           0xc0f3