mmCP_CE_INTR_ROUTINE_START_BASE_IDX 4903 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CE_INTR_ROUTINE_START_BASE_IDX                                                            0
mmCP_CE_INTR_ROUTINE_START_BASE_IDX 2543 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CE_INTR_ROUTINE_START_BASE_IDX                                                            0
mmCP_CE_INTR_ROUTINE_START_BASE_IDX 2835 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CE_INTR_ROUTINE_START_BASE_IDX                                                            0
mmCP_CE_INTR_ROUTINE_START_BASE_IDX 2769 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CE_INTR_ROUTINE_START_BASE_IDX                                                            0