mmCP_CE_INSTR_PNTR_BASE_IDX 2189 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_CE_INSTR_PNTR_BASE_IDX                                                                    0
mmCP_CE_INSTR_PNTR_BASE_IDX  185 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_CE_INSTR_PNTR_BASE_IDX                                                                    0
mmCP_CE_INSTR_PNTR_BASE_IDX  185 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_CE_INSTR_PNTR_BASE_IDX                                                                    0
mmCP_CE_INSTR_PNTR_BASE_IDX  179 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_CE_INSTR_PNTR_BASE_IDX                                                                    0