mmCP_BUSY_STAT_BASE_IDX 2173 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_BUSY_STAT_BASE_IDX                                                                        0
mmCP_BUSY_STAT_BASE_IDX  169 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_BUSY_STAT_BASE_IDX                                                                        0
mmCP_BUSY_STAT_BASE_IDX  169 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_BUSY_STAT_BASE_IDX                                                                        0
mmCP_BUSY_STAT_BASE_IDX  163 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_BUSY_STAT_BASE_IDX                                                                        0