mmCP_AQL_SMM_STATUS 4702 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCP_AQL_SMM_STATUS                                                                            0x1ddf
mmCP_AQL_SMM_STATUS 2333 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCP_AQL_SMM_STATUS                                                                            0x103f
mmCP_AQL_SMM_STATUS 2632 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCP_AQL_SMM_STATUS                                                                            0x103f
mmCP_AQL_SMM_STATUS 2570 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCP_AQL_SMM_STATUS                                                                            0x103f