mmCPF_UTCL1_STATUS 5152 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCPF_UTCL1_STATUS                                                                             0x1f56
mmCPF_UTCL1_STATUS 2642 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCPF_UTCL1_STATUS                                                                             0x11b6
mmCPF_UTCL1_STATUS 2916 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCPF_UTCL1_STATUS                                                                             0x11b6
mmCPF_UTCL1_STATUS 2850 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCPF_UTCL1_STATUS                                                                             0x11b6