mmCPF_UTCL1_CNTL 4700 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCPF_UTCL1_CNTL                                                                               0x1dde
mmCPF_UTCL1_CNTL 2331 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCPF_UTCL1_CNTL                                                                               0x103e
mmCPF_UTCL1_CNTL 2630 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCPF_UTCL1_CNTL                                                                               0x103e
mmCPF_UTCL1_CNTL 2568 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCPF_UTCL1_CNTL                                                                               0x103e