mmCPC_INT_STATUS 4928 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCPC_INT_STATUS                                                                               0x1e55
mmCPC_INT_STATUS 2568 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCPC_INT_STATUS                                                                               0x10b5
mmCPC_INT_STATUS 2860 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCPC_INT_STATUS                                                                               0x10b5
mmCPC_INT_STATUS 2794 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCPC_INT_STATUS                                                                               0x10b5
mmCPC_INT_STATUS  273 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCPC_INT_STATUS                                                        0x30b5
mmCPC_INT_STATUS  275 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCPC_INT_STATUS                                                        0x30b5
mmCPC_INT_STATUS  306 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCPC_INT_STATUS                                                        0x30b5
mmCPC_INT_STATUS  306 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCPC_INT_STATUS                                                        0x30b5