mmCPC_INT_CNTL   4926 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCPC_INT_CNTL                                                                                 0x1e54
mmCPC_INT_CNTL   2566 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCPC_INT_CNTL                                                                                 0x10b4
mmCPC_INT_CNTL   2858 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCPC_INT_CNTL                                                                                 0x10b4
mmCPC_INT_CNTL   2792 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCPC_INT_CNTL                                                                                 0x10b4
mmCPC_INT_CNTL    264 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmCPC_INT_CNTL                                                          0x30b4
mmCPC_INT_CNTL    266 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmCPC_INT_CNTL                                                          0x30b4
mmCPC_INT_CNTL    297 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmCPC_INT_CNTL                                                          0x30b4
mmCPC_INT_CNTL    297 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmCPC_INT_CNTL                                                          0x30b4