mmCOMPUTE_PGM_RSRC1_BASE_IDX 4569 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmCOMPUTE_PGM_RSRC1_BASE_IDX                                                                   0
mmCOMPUTE_PGM_RSRC1_BASE_IDX 2196 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmCOMPUTE_PGM_RSRC1_BASE_IDX                                                                   0
mmCOMPUTE_PGM_RSRC1_BASE_IDX 2495 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmCOMPUTE_PGM_RSRC1_BASE_IDX                                                                   0
mmCOMPUTE_PGM_RSRC1_BASE_IDX 2429 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmCOMPUTE_PGM_RSRC1_BASE_IDX                                                                   0