mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX 4925 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX                                                           2
mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX 6011 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX                                                           2
mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX 5073 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCNVC_CUR3_CURSOR0_CONTROL_BASE_IDX                                                           2