mmCNVC_CUR1_CURSOR0_CONTROL 3974 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCNVC_CUR1_CURSOR0_CONTROL                                                                    0x0d73
mmCNVC_CUR1_CURSOR0_CONTROL 4862 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCNVC_CUR1_CURSOR0_CONTROL                                                                    0x0e4b
mmCNVC_CUR1_CURSOR0_CONTROL 3924 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCNVC_CUR1_CURSOR0_CONTROL                                                                    0x0e4b