mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX 3499 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX                                                           2
mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX 4289 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX                                                           2
mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX 3351 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCNVC_CUR0_CURSOR0_CONTROL_BASE_IDX                                                           2