mmCM3_CM_MEM_PWR_STATUS 5330 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM3_CM_MEM_PWR_STATUS                                                                        0x1084
mmCM3_CM_MEM_PWR_STATUS 6368 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM3_CM_MEM_PWR_STATUS                                                                        0x11e4
mmCM3_CM_MEM_PWR_STATUS 5430 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM3_CM_MEM_PWR_STATUS                                                                        0x11e4