mmCM3_CM_DGAM_RAMA_END_CNTL2_G 5128 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL2_G                                                                 0x101f
mmCM3_CM_DGAM_RAMA_END_CNTL2_G 6178 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL2_G                                                                 0x1185
mmCM3_CM_DGAM_RAMA_END_CNTL2_G 5240 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL2_G                                                                 0x1185