mmCM3_CM_DGAM_RAMA_END_CNTL1_R 5130 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_R                                                                 0x1020
mmCM3_CM_DGAM_RAMA_END_CNTL1_R 6180 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_R                                                                 0x1186
mmCM3_CM_DGAM_RAMA_END_CNTL1_R 5242 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_R                                                                 0x1186