mmCM3_CM_DGAM_RAMA_END_CNTL1_G 5126 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_G                                                                 0x101e
mmCM3_CM_DGAM_RAMA_END_CNTL1_G 6176 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_G                                                                 0x1184
mmCM3_CM_DGAM_RAMA_END_CNTL1_G 5238 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_G                                                                 0x1184