mmCM3_CM_DGAM_RAMA_END_CNTL1_B 5122 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_B                                                                 0x101c
mmCM3_CM_DGAM_RAMA_END_CNTL1_B 6172 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_B                                                                 0x1182
mmCM3_CM_DGAM_RAMA_END_CNTL1_B 5234 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM3_CM_DGAM_RAMA_END_CNTL1_B                                                                 0x1182