mmCM2_CM_MEM_PWR_STATUS 4855 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM2_CM_MEM_PWR_STATUS                                                                        0x0f69
mmCM2_CM_MEM_PWR_STATUS 5794 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_MEM_PWR_STATUS                                                                        0x1079
mmCM2_CM_MEM_PWR_STATUS 4856 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_MEM_PWR_STATUS                                                                        0x1079