mmCM2_CM_MEM_PWR_CTRL 4853 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM2_CM_MEM_PWR_CTRL                                                                          0x0f68
mmCM2_CM_MEM_PWR_CTRL 5792 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_MEM_PWR_CTRL                                                                          0x1078
mmCM2_CM_MEM_PWR_CTRL 4854 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_MEM_PWR_CTRL                                                                          0x1078