mmCM2_CM_ICSC_C31_C32_BASE_IDX 4590 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM2_CM_ICSC_C31_C32_BASE_IDX                                                                 2
mmCM2_CM_ICSC_C31_C32_BASE_IDX 5533 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_ICSC_C31_C32_BASE_IDX                                                                 2
mmCM2_CM_ICSC_C31_C32_BASE_IDX 4595 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_ICSC_C31_C32_BASE_IDX                                                                 2