mmCM2_CM_DGAM_RAMA_END_CNTL2_R 4657 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM2_CM_DGAM_RAMA_END_CNTL2_R                                                                 0x0f06
mmCM2_CM_DGAM_RAMA_END_CNTL2_R 5608 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_DGAM_RAMA_END_CNTL2_R                                                                 0x101c
mmCM2_CM_DGAM_RAMA_END_CNTL2_R 4670 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_DGAM_RAMA_END_CNTL2_R                                                                 0x101c