mmCM2_CM_DGAM_LUT_WRITE_EN_MASK 4633 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM2_CM_DGAM_LUT_WRITE_EN_MASK                                                                0x0efa
mmCM2_CM_DGAM_LUT_WRITE_EN_MASK 5584 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_DGAM_LUT_WRITE_EN_MASK                                                                0x1010
mmCM2_CM_DGAM_LUT_WRITE_EN_MASK 4646 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_DGAM_LUT_WRITE_EN_MASK                                                                0x1010