mmCM2_CM_BLNDGAM_LUT_WRITE_EN_MASK_BASE_IDX 5673 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_BLNDGAM_LUT_WRITE_EN_MASK_BASE_IDX                                                    2
mmCM2_CM_BLNDGAM_LUT_WRITE_EN_MASK_BASE_IDX 4735 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_BLNDGAM_LUT_WRITE_EN_MASK_BASE_IDX                                                    2