mmCM2_CM_3DLUT_READ_WRITE_CONTROL_BASE_IDX 5923 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM2_CM_3DLUT_READ_WRITE_CONTROL_BASE_IDX                                                     2
mmCM2_CM_3DLUT_READ_WRITE_CONTROL_BASE_IDX 4985 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM2_CM_3DLUT_READ_WRITE_CONTROL_BASE_IDX                                                     2