mmCM1_CM_MEM_PWR_CTRL2 5336 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_MEM_PWR_CTRL2                                                                         0x0f49
mmCM1_CM_MEM_PWR_CTRL2 4398 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_MEM_PWR_CTRL2                                                                         0x0f49