mmCM1_CM_ICSC_C21_C22_BASE_IDX 4111 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM1_CM_ICSC_C21_C22_BASE_IDX                                                                 2
mmCM1_CM_ICSC_C21_C22_BASE_IDX 4955 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_ICSC_C21_C22_BASE_IDX                                                                 2
mmCM1_CM_ICSC_C21_C22_BASE_IDX 4017 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_ICSC_C21_C22_BASE_IDX                                                                 2