mmCM1_CM_ICSC_B_C31_C32_BASE_IDX 4971 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_ICSC_B_C31_C32_BASE_IDX                                                               2
mmCM1_CM_ICSC_B_C31_C32_BASE_IDX 4033 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_ICSC_B_C31_C32_BASE_IDX                                                               2