mmCM1_CM_HDR_MULT_COEF 4364 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmCM1_CM_HDR_MULT_COEF                                                                         0x0e46
mmCM1_CM_HDR_MULT_COEF 5216 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmCM1_CM_HDR_MULT_COEF                                                                         0x0f0c
mmCM1_CM_HDR_MULT_COEF 4278 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmCM1_CM_HDR_MULT_COEF                                                                         0x0f0c